INTERNSHIP EXPERIENCE
Name
Pratik kaul
LinkedIn Profile
College Name
National Institute of Technology Warangal
Branch
Electrical and electronics engineering
Company's Name
Texas instruments
Role
Analog design, (Internship only)
Brief description of role
Designing analog circuits.
Job Location
Bangalore
Eligible branches
EEE, ECE for digital and analog design. ECE, CSE, EEE for embedded software engineer
Eligibility Criteria
7 CGPA, No active backlog
Selection Procedure
Round 1- Online test Round 2- Tech interview
Description of Online Test
Online test had 2,3 sections or 4 sections depending on what you had chosen. One aptitude section and 3 tech sections - Digital, Analog and Embedded Software. Analog - This section had 20 questions, a time limit of 45 minutes. This is the hardest section and needs very good intuition. Questions were based on switching RC circuits, Diodes, filters, BJT and OpAmps circuits. Digital - The questions were application based and moderately difficult. The majority of the questions were based on counters, flip-flops, k-maps, combinational logic, and a couple of Verilog code snippets. Embedded – This section was based on C and assembly code. Questions on operating systems, 8086 and computer architecture were also asked. Aptitude - This section was pretty standard and easy. Normal questions like every company asks. Just checkout IndiaBix or similar resources.
Description of Technical interview
Analog - The number of interview for a candidate varies I had two interviews, both around an hour long. The interview began with some basic circuit analysis questions like a draw resistive voltage divider and then the difficulty was slowly increasing by adding more components and changing the conditions. Then the interviewer asked me some questions about the Norton theorem. Some questions were based on Opamp and virtual ground concept(very Imp) and some questions were asked on the frequency analysis of signals. The second round was mostly based on frequency and S-domain analysis of circuits. I was asked to draw bode plots for some circuits like integrators and was later asked to draw phase plots. Some questions on negative and positive feedback effects on OpAmp and also a very basic question on Nyquist theorem. Digital - The interview started with me introducing myself. The interviewer then asked about the digital electronics course and what digital logic means. He asked about gates and universal gates and made an OR gate using only NAND gates. Then a basic KMAP question, then moved on to digital logic and asked about CMOS inverters and mosfets structure as well as working. He gave me a circuit with an inverter and an nmos. Later he gave some more flip-flop based circuits and asked me to find the output after some clock cycles. The interview ended with questions on setup ,hold time, and latch based time borrowing concepts.
Description of HR round
None
What should be the preparation strategy for an aspiring candidate?
Know your basics of subjects like analog electronics, digital electronics, circuit theory. Try to solve as many questions as you can and be confident in your concepts. There is no need to learn very complex circuits, just stick to basics and be thorough with them.
Resources for Preparation
Analog electronics:- Circuit analysis (MOST IMP) - AK chakraborty for circuit theory and for RC circuits NPTEL lectures of Nagendra Sir-available on YouTube ( lecture 114 – 148 ) BJT ,Mosfets, diodes structure and working (Starting 6 chapters of Razavi is MORE THAN ENOUGH ) . Active and Passive Filters. OP-AMPS and virtual ground. Basics of Control system and signal and systems ( Just browse through it ) . Digital electronics:- Digital – Morris Mano is great , Neso academy is also fine. Concentrate on FSMs ,flip-flops based circuits, glitches , clock divider circuits. CMOS inverters – Jan Rabaey or Weste. VLSI expert for STA and VLSI basics. Verilog – Samir Palnitkar is great and ASIC WORLD blogs are also good if you are low on time. For aptitude refer to IndiaBix, I found that enough
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