Qualcomm

PLACEMENT EXPERIENCE

Name

Harshavardhan Nune

College Name

NIT Warangal

Branch

Electrical and Electronics Engineering

Company's Name

Qualcomm

Role

Hardware Engineer, (6 months intern + FTE)

Job Location

Banglore

Eligible branches

ECE,EEE (for hardware profile)

Eligibility Criteria

CGPA cutoff: 7

Selection Procedure

Round 1 - Online Test Round 2 - Technical Interview-1 Round 3 - Technical Interview-2 Round 4 - Technical Interview-3

Description of Online Test

1)Aptitude (20 questions) - 30min • Time and work, Permutations and Combinations, Data interpretation, Verbal reasoning (Most questions were time consuming) 2)Basic Programming (20 questions) - 30min • Find output of C/C++ programs. Clear understanding of Structures, unions, pointers, enum is required to solve these. • Computer architecture and Operating Systems 3)Technical (20 questions) – 30min We can choose Digital/Communications / Software for this section. I have chosen Digital. • Digital Electronics: Counters, flipflops, LFSR and Combinational Logic • Setup and Hold time analysis, CMOS circuits

Description of Technical interview

Technical Interview -1 : Interviewer wanted to test my knowledge about Microprocessors and Computer Organisation since I mentioned them on my resume. Started by asking some general questions like what happens behind a laptop/PC when it is turned on and about RAM, ROM, Cache and Flash Memory What is an SOC? What is pipelining and explain about 5 stage pipeline. About 8086 microprocessor He then showed me an Assembly language program and asked me to explain how each instruction will get executed in a 5-stage pipelined processor. Verilog code for 3:8 decoder Write C/C++ programs for finding n factorial and bubble sort algorithm. Then asked me to convert them into Assembly language programs. Technical Interview-2 : Design frequency/2 and frequency/4 circuits using D flipflops. Design f/3 circuit with 33%,50%,66% duty cycles. He then gave me specifications for how a vending machine should work and asked me to draw an FSM for this model. Questions about Setup and Hold time Technical Interview-3: Questions about data structures, dynamic memory allocation, Verilog, discussion on my projects

Description of HR round

No HR round

Resources for Preparation

Digital Electronics: Any textbook is fine (ex: Morris Mano). Analog Electronics: Millman & Halkias textbook, Behzad Razavi Electronics-1 course (Youtube). Solve all DE and AE questions from previous years ECE and EEE Gate papers. Verilog: NPTEL lectures, Samir Palnitkar textbook, asic-world, asicguru websites For practice – HDLbits website Digital Integrated Circuits course by Jan Rabaey (Youtube) Static Timing Analysis : Yash Jain youtube channel Clock Domain Crossing : Sunburst design paper Microprocessors : AK Ray and KM Burchindi